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dt-bindings: riscv: Add T-HEAD C906 and C910 compatibles
authorSamuel Holland <samuel@sholland.org>
Mon, 15 Aug 2022 05:08:05 +0000 (00:08 -0500)
committerConor Dooley <conor.dooley@microchip.com>
Sun, 20 Nov 2022 11:10:48 +0000 (11:10 +0000)
commit41adc2fbad8bc42ed5fdf480e5318133a4941bbb
tree05e8e54b6b04c73bb7aebed4fd37ed3b9c8c959etree | snapshot
parent9abf2313adc1ca1b6180c508c25f22f9395cc780commit | diff
dt-bindings: riscv: Add T-HEAD C906 and C910 compatibles

The C906 and C910 are RISC-V CPU cores from T-HEAD Semiconductor.
Notably, the C906 core is used in the Allwinner D1 SoC.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Documentation/devicetree/bindings/riscv/cpus.yaml diff | blob | history
Domain: System / Kernel;