[COMMITTED] Fix PR aarch64/104474: ICE with vector float initializers and non-consts.
authorAndrew Pinski <apinski@marvell.com>
Wed, 9 Feb 2022 22:56:58 +0000 (14:56 -0800)
committerAndrew Pinski <apinski@marvell.com>
Thu, 10 Feb 2022 00:49:33 +0000 (16:49 -0800)
commit41582f88ec01c5ce2f85ebc4ac2743eb426d6e33
treef49af1bf19ee7e39701cc7a3471491a49836b3b6
parent3adf509fe6feca9442fb36c35dd9a81a3a369d08
[COMMITTED] Fix PR aarch64/104474: ICE with vector float initializers and non-consts.

The problem here is that the aarch64 back-end was placing const0_rtx
into the constant vector RTL even if the mode was a floating point mode.
The fix is instead to use CONST0_RTX and pass the mode to select the
correct zero (either const_int or const_double).

Committed as obvious after a bootstrap/test on aarch64-linux-gnu with
no regressions.

PR target/104474

gcc/ChangeLog:

* config/aarch64/aarch64.cc
(aarch64_sve_expand_vector_init_handle_trailing_constants):
Use CONST0_RTX instead of const0_rtx for the non-constant elements.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/sve/pr104474-1.c: New test.
* gcc.target/aarch64/sve/pr104474-2.c: New test.
* gcc.target/aarch64/sve/pr104474-3.c: New test.
gcc/config/aarch64/aarch64.cc
gcc/testsuite/gcc.target/aarch64/sve/pr104474-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/aarch64/sve/pr104474-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/aarch64/sve/pr104474-3.c [new file with mode: 0644]