mv_ddr: ddr3: Use correct bitmask for read sample delay
authorChris Packham <chris.packham@alliedtelesis.co.nz>
Wed, 27 May 2020 01:31:29 +0000 (13:31 +1200)
committerStefan Roese <sr@denx.de>
Thu, 9 Jul 2020 04:49:44 +0000 (06:49 +0200)
commit40ed88529c6ad73c20908c2c5cdbdcc01da3d476
tree8c3cfdce8c069357072b8beb55dbb9650cb5b8f8
parent61608f395e7dcb2be6060407a72a1149b046430a
mv_ddr: ddr3: Use correct bitmask for read sample delay

In the Armada 385 functional spec (MV-S109094-00 Rev. C) the read sample
delay fields are 5 bits wide. Use the correct bitmask of 0x1f when
extracting the value.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
[upstream https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/22]
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c