StructurizeCFG: prefer reduced number of live values
authorRuiling Song <ruiling.song@amd.com>
Mon, 22 Aug 2022 09:45:42 +0000 (17:45 +0800)
committerRuiling Song <ruiling.song@amd.com>
Mon, 26 Sep 2022 01:54:47 +0000 (09:54 +0800)
commit40e9284f3c4c1643ae48afae0658e32d5d39718f
tree4b997f2ce2b0519d043b83cfc0e0dcd0720da141
parent66325d9ba19dee10adfe587b6c59fad7dc0882bf
StructurizeCFG: prefer reduced number of live values

The instruction simplification will try to simplify the affected phis.
In some cases, this might extend the liveness of values. For example:

  BB0:
   | \
   | BB1
   | /
  BB2:phi (BB0, v), (BB1, undef)

The phi in BB2 will be simplified to v as v dominates BB2, but this is
increasing the number of active values in BB1. By setting CanUseUndef
to false, we will not simplify the phi in this way, this would help
register pressure. This is mandatory for the later change to help
reducing VGPR pressure for AMDGPU.

Reviewed by: foad, sameerds

Differential Revision: https://reviews.llvm.org/D132449
16 files changed:
llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
llvm/test/CodeGen/AMDGPU/loop_break.ll
llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
llvm/test/CodeGen/AMDGPU/multilevel-break.ll
llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
llvm/test/CodeGen/AMDGPU/while-break.ll
llvm/test/Transforms/StructurizeCFG/AMDGPU/loop-subregion-misordered.ll
llvm/test/Transforms/StructurizeCFG/interleaved-loop-order.ll
llvm/test/Transforms/StructurizeCFG/loop-continue-phi.ll
llvm/test/Transforms/StructurizeCFG/one-loop-multiple-backedges.ll
llvm/test/Transforms/StructurizeCFG/workarounds/needs-fix-reducible.ll
llvm/test/Transforms/StructurizeCFG/workarounds/needs-fr-ule.ll
llvm/test/Transforms/StructurizeCFG/workarounds/needs-unified-loop-exits.ll