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(parent: 77b6706) | patch
clk: sunxi: Add dummy fixed rate clock for Allwinner A1X SoCs
authorMaxime Ripard <maxime.ripard@free-electrons.com>
Fri, 16 Nov 2012 20:21:43 +0000 (21:21 +0100)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Fri, 16 Nov 2012 20:46:39 +0000 (21:46 +0100)
commit404525d5a7ecc847b5ac178dad96402f1e102ccc
tree6a1eb744d54f1d43734f65899e2e720010d0fb48tree | snapshot
parent77b67063bb6bce6d475e910d3b886a606d0d91f7commit | diff
clk: sunxi: Add dummy fixed rate clock for Allwinner A1X SoCs

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Mike Turquette <mturquette@ti.com>
drivers/clk/Makefile diff | blob | history
drivers/clk/clk-sunxi.c [new file with mode: 0644] blob
include/linux/clk/sunxi.h [new file with mode: 0644] blob
Domain: System / Kernel;