drm/rockchip: dw-mipi-dsi: properly configure PHY timing
authorJohn Keeping <john@metanate.com>
Fri, 24 Feb 2017 12:54:59 +0000 (12:54 +0000)
committerSean Paul <seanpaul@chromium.org>
Wed, 1 Mar 2017 19:48:56 +0000 (14:48 -0500)
commit3fdfb4f170df4d113a3b6663ebf115e10601d0e9
tree35dce9163b1e595d2703f4c0f59dc14912c8a870
parentd969c1553c41c5d5a0d88268aa65f4e77130a5dd
drm/rockchip: dw-mipi-dsi: properly configure PHY timing

These values are specified as constant time periods but the PHY
configuration is in terms of the current lane byte clock so using
constant values guarantees that the timings will be outside the
specification with some display configurations.

Derive the necessary configuration from the byte clock in order to
ensure that the PHY configuration is correct.

Signed-off-by: John Keeping <john@metanate.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: http://patchwork.freedesktop.org/patch/msgid/20170224125506.21533-17-john@metanate.com
drivers/gpu/drm/rockchip/dw-mipi-dsi.c