riscv: add missing SBI extension definitions
authorHeinrich Schuchardt <heinrich.schuchardt@canonical.com>
Sun, 12 Sep 2021 19:11:44 +0000 (21:11 +0200)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Thu, 7 Oct 2021 08:08:23 +0000 (16:08 +0800)
commit3fbcfaa6f38c7549553fb8bf31896f205a7bf93a
tree6e7ececc0ca9a01e7571ac04bbe9d627824ef222
parentdd573b6b213e859b9d705aabee3ba09e7e7012d2
riscv: add missing SBI extension definitions

Add the System Reset Extension and the Hart State Management Extension
definitions.

Add missing RFENCE Extension enum values.

The SBI 0.1 extension constants are needed for the sbi command. Remove
an #ifdef.

Cf. https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
arch/riscv/include/asm/sbi.h