i2c: designware: Drop hard coded FIFO depth assignment
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Tue, 19 May 2020 12:50:43 +0000 (15:50 +0300)
committerWolfram Sang <wsa@kernel.org>
Fri, 22 May 2020 14:50:43 +0000 (16:50 +0200)
commit3f35064a7cfef4ed8d25cdb16da0abfbbd525f63
treeef36a39ee37d87086f701b0564d7da20916f05ac
parent64d0a0755c7deeb600d8ee287cfb84469aa37ac8
i2c: designware: Drop hard coded FIFO depth assignment

It's not clear why the commit fe20ff5c7e9c
  ("i2c-designware: Add support for Designware core behind PCI devices.")
followed by commit b61b14154b19
  ("i2c-designware: add support for Intel Lynxpoint")
chose to hard code FIFO depth size. The FIFO depth on all hardware,
I have tested on, can be nicely detected automatically.

Thus, we may safely drop hard coded FIFO sizes from the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
drivers/i2c/busses/i2c-designware-common.c
drivers/i2c/busses/i2c-designware-pcidrv.c