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(parent: fd99d76) | patch
Update ACL (#2301)
author장지섭/동작제어Lab(SR)/Engineer/삼성전자 <jiseob.jang@samsung.com>
Thu, 16 Aug 2018 02:26:58 +0000 (11:26 +0900)
committer오형석/동작제어Lab(SR)/Staff Engineer/삼성전자 <hseok82.oh@samsung.com>
Thu, 16 Aug 2018 02:26:58 +0000 (11:26 +0900)
commit3f09beb8fb60d7829fff56be38a15328c0c73be2
treeb4269c0b3de1473d0c73864c406626a7a8fd0bf7tree | snapshot
parentfd99d768a5300aeb0441d790a4aa83131fa013c4commit | diff
Update ACL (#2301)

- Enable QASYMM8 in the CLArithmeticAdditionKernel.
- Extend the range in which StridedSlice is supported for CPU.
- Bugfix of subtensor validation.
- Unify the order of input data in StridedSliceCPU.

Signed-off-by: jiseob.jang <jiseob.jang@samsung.com>
externals/acl diff | blob | history
Domain: Machine Learning / ML Framework;