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[LV] Add abs/smin/smax/umin/umax intrinsics to isTriviallyVectorizable
authorCraig Topper <craig.topper@intel.com>
Wed, 29 Jul 2020 17:05:25 +0000 (10:05 -0700)
committerCraig Topper <craig.topper@intel.com>
Wed, 29 Jul 2020 17:23:07 +0000 (10:23 -0700)
commit3efc978baede3ffb4616774e3d1c722fe4128ef5
tree307d71f6637cd6567626c0f8f1a2643d17f25ab7tree | snapshot
parent71d0a2b8a31344ab29d1afd0c54d89873fb3cc9ecommit | diff
[LV] Add abs/smin/smax/umin/umax intrinsics to isTriviallyVectorizable

This patch adds support for vectorizing these intrinsics.

Differential Revision: https://reviews.llvm.org/D84796
llvm/lib/Analysis/VectorUtils.cpp diff | blob | history
llvm/test/Transforms/LoopVectorize/intrinsic.ll diff | blob | history
Domain: System / Toolchain;