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(parent: a973be7) | patch
arm: rmobile: r8a7794: Enable SMP mode of Auxiliary Control Register
authorNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Fri, 23 Jan 2015 00:31:57 +0000 (09:31 +0900)
committerNobuhiro Iwamatsu <iwamatsu@nigauri.org>
Fri, 13 Feb 2015 04:14:56 +0000 (13:14 +0900)
commit3eda55a32d3787303934a1575684a8f61c362892
treecbeb5b3c02b825d4524cae8e90713ab13759f879tree | snapshot
parenta973be74c206d6cc04ccee9de6831c1e98d9527bcommit | diff
arm: rmobile: r8a7794: Enable SMP mode of Auxiliary Control Register

r8a7794 uses ARM SoC of CA7 base. If we want to use dcache on CA7, we
need to enable SMP bit of Auxiliary Control Register.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S diff | blob | history
Domain: System / Kernel;