Fixed the condition codes for the atomic64 min/umin code generation on ARM. If the...
authorSilviu Baranga <silviu.baranga@arm.com>
Fri, 25 Jan 2013 10:39:49 +0000 (10:39 +0000)
committerSilviu Baranga <silviu.baranga@arm.com>
Fri, 25 Jan 2013 10:39:49 +0000 (10:39 +0000)
commit3eb45a03afe8cb667864adb350003f08f15f680d
tree89bab7e7f98efdf69fa12f3ef35e81712b868e5b
parenta6202a23e61f4e3ff4a88abe9bab95c19771bdbb
Fixed the condition codes for the atomic64 min/umin code generation on ARM. If the sutraction of the higher 32 bit parts gives a 0 result, we need to do the store operation.

llvm-svn: 173437
llvm/lib/Target/ARM/ARMISelLowering.cpp
llvm/test/CodeGen/ARM/atomic-64bit.ll