drm/i915: s/PIPECONF/TRANSCONF/
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 13 Feb 2023 22:52:50 +0000 (00:52 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 17 Feb 2023 21:25:15 +0000 (23:25 +0200)
commit3eb08ea58e5717cf758b9eff6d9604aa3525ab94
treef3dbad3b13d793f0fb6924dce01595c19298cbde
parent5ac421a9ec6668369b7910d4b1e7f5e7e9e9ec94
drm/i915: s/PIPECONF/TRANSCONF/

Rename PIPECONF to TRANSCONF to make it clear what it actually
applies to.

While the usual convention is to pick the earliers name I think
in this case it's more clear to use the later name. Especially
as even the register offset is in the wrong range (0x70000 vs.
0x60000) and thus makes it look like this is per-pipe.

There is one place in gvt that's doing something with TRANSCONF
while iterating with for_each_pipe(). So that might not be doing
the right thing for TRANSCODER_EDP, dunno. Not knowing what it
does I left it as is to avoid breakage.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230213225258.2127-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
17 files changed:
drivers/gpu/drm/i915/display/icl_dsi.c
drivers/gpu/drm/i915/display/intel_color.c
drivers/gpu/drm/i915/display/intel_crt.c
drivers/gpu/drm/i915/display/intel_display.c
drivers/gpu/drm/i915/display/intel_display_power_well.c
drivers/gpu/drm/i915/display/intel_dp.c
drivers/gpu/drm/i915/display/intel_drrs.c
drivers/gpu/drm/i915/display/intel_fdi.c
drivers/gpu/drm/i915/display/intel_hdmi.c
drivers/gpu/drm/i915/display/intel_lvds.c
drivers/gpu/drm/i915/display/intel_pch_display.c
drivers/gpu/drm/i915/display/intel_vblank.c
drivers/gpu/drm/i915/display/vlv_dsi.c
drivers/gpu/drm/i915/gvt/display.c
drivers/gpu/drm/i915/gvt/handlers.c
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_gvt_mmio_table.c