Fix operands order in BMI2 patterns.
authorhjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Thu, 20 Oct 2011 20:37:32 +0000 (20:37 +0000)
committerhjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Thu, 20 Oct 2011 20:37:32 +0000 (20:37 +0000)
commit3e7be5b85517946b2d9024b4ea18540f7d6e8ff8
treeae3171dc2b2dcc57fce98ff4077b5093c9966749
parent428d5ecfa362d241c5302e0460585e11f275b9f4
Fix operands order in BMI2 patterns.

gcc/

2011-10-20  Kirill Yukhin  <kirill.yukhin@intel.com>

PR target/50766
* config/i386/i386.md (bmi_bextr_<mode>): Update register/
memory operand order.
(bmi2_bzhi_<mode>3): Ditto.
(bmi2_pdep_<mode>3): Ditto.
(bmi2_pext_<mode>3): Ditto.

gcc/testsuite/

2011-10-20  Kirill Yukhin  <kirill.yukhin@intel.com>

PR target/50766
* gcc.target/i386/pr50766.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@180271 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/ChangeLog
gcc/config/i386/i386.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/i386/pr50766.c [new file with mode: 0644]