x86: ivybridge: Enable the MRC cache
authorBin Meng <bmeng.cn@gmail.com>
Sun, 18 Oct 2015 21:55:37 +0000 (15:55 -0600)
committerSimon Glass <sjg@chromium.org>
Wed, 21 Oct 2015 13:46:51 +0000 (07:46 -0600)
commit3e45de6ed416759f0f2699d5bb358183dbdb2063
tree5e1ca3e7807d8a3735929c642e3ad746dd264ca5
parentfd8f4729ac6520e59dd1d3f57d503d8abe345ac5
x86: ivybridge: Enable the MRC cache

This works correctly now, so enable it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Dropped malloc() and adjusted commit message:
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
arch/x86/cpu/ivybridge/sdram.c