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[AMDGPU][GFX11] Fix dst register class for V_CVT_U32_U16
authorJoe Nash <Joseph.Nash@amd.com>
Mon, 29 Aug 2022 18:42:20 +0000 (14:42 -0400)
committerJoe Nash <Joseph.Nash@amd.com>
Tue, 30 Aug 2022 18:01:25 +0000 (14:01 -0400)
commit3e39ab25e6cc912f211bbe42950ebe71103dad54
treeeed8af17f074eb533b76a6e1e46561ae40df9b2ctree | snapshot
parentcd40245f549b8bd7a5b6571c2eb6a882ce59acc9commit | diff
[AMDGPU][GFX11] Fix dst register class for V_CVT_U32_U16

This instruction was referring to the wrong VOPProfile, likely due to a
typo, leading to an incorrect destination register type.

The MC layer will care about this change, but is NFC while 16-bit values
actually use 32 bit registers.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D132878
llvm/lib/Target/AMDGPU/VOP1Instructions.td diff | blob | history
Domain: System / Toolchain;