sbc8548: enable support for hardware SPD errata workaround
authorPaul Gortmaker <paul.gortmaker@windriver.com>
Sat, 31 Dec 2011 04:53:12 +0000 (23:53 -0500)
committerKumar Gala <galak@kernel.crashing.org>
Wed, 11 Jan 2012 19:59:14 +0000 (13:59 -0600)
commit3e3262bd149e21d0f5a82648218c26f2aa0e15e7
tree954100513b29dbcea5804303864c74d75ba729b0
parent2a6b3b74d85cff3f9a76edd09a7b2e8e25bb4eb4
sbc8548: enable support for hardware SPD errata workaround

Existing boards by default have an issue where the LBC SDRAM
SPD EEPROM and the DDR2 SDRAM SPD EEPROM both land at 0x51.

After the hardware modification listed in the README is made,
then the DDR2 SPD EEPROM appears at 0x53.  So this implements
a board specific get_spd() by taking advantage of the existing
weak linkage, that 1st tries reading at 0x53 and then if that
fails, it falls back to the old 0x51.

Since the old dependency issue of "SPD implies no LBC SDRAM"
gets removed with the hardware errata fix, remove that restriction
in the code, so both LBC SDRAM and SPD can be selected.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
board/sbc8548/ddr.c
doc/README.sbc8548
include/configs/sbc8548.h