clk: vc5: Add support for IDT VersaClock 5P49V5923 and 5P49V5933
authorMarek Vasut <marek.vasut@gmail.com>
Thu, 12 Jan 2017 01:03:24 +0000 (02:03 +0100)
committerStephen Boyd <sboyd@codeaurora.org>
Sat, 21 Jan 2017 00:17:34 +0000 (16:17 -0800)
commit3e1aec4e2c415346df7d5429f7413837ddaaedd7
tree719a35cec851d3d219d35332e7a1275ec06bc9f7
parent9044d87377b3edbd06468a93818f0609d640c238
clk: vc5: Add support for IDT VersaClock 5P49V5923 and 5P49V5933

Add driver for IDT VersaClock 5 5P49V5923 and 5P49V5933 chips. These
chips have two clock inputs, XTAL or CLK, which are muxed into single
PLL/VCO input. In case of 5P49V5923, the XTAL in built into the chip
while the 5P49V5923 requires external XTAL.

The PLL feeds two fractional dividers. Each fractional divider feeds
output mux, which allows selecting between clock from the fractional
divider itself or from output mux on output N-1. In case of output
mux 0, the output N-1 is instead connected to the output from the mux
feeding the PLL.

The driver thus far supports only the 5P49V5923 and 5P49V5933, while
it should be easily extensible to the whole 5P49V59xx family of chips
as they are all pretty similar.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: linux-renesas-soc@vger.kernel.org
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
MAINTAINERS
drivers/clk/Kconfig
drivers/clk/Makefile
drivers/clk/clk-versaclock5.c [new file with mode: 0644]