dt-bindings: gpio: Add binding for Versal gpio
authorShubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Wed, 17 Jun 2020 11:37:22 +0000 (17:07 +0530)
committerBartosz Golaszewski <bgolaszewski@baylibre.com>
Wed, 24 Jun 2020 10:10:37 +0000 (12:10 +0200)
commit3e1ad2b858dd1c1e795e3817aa31f0a301d6aeba
treecf0860e2846927735e7adcc1831c654d68063ec1
parentfdcfec11b215b3bbc9c20240739cf76be921cca1
dt-bindings: gpio: Add binding for Versal gpio

Add binding for Versal binding.

Versal devices are the industry's first adaptive compute
acceleration platforms.
https://www.xilinx.com/support/documentation/data_sheets/ds950-versal-overview.pdf

On the Versal platform, we are using two customized GPIO controllers(IP)
which were used in Zynq/ZynqMp platform.
One of them present in the Platform Management Controller(PMC) block and
other in Processing System(PS) block.

In PMC_GPIO only Bank0,1,3 & 4 are enabled and in PS_GPIO only
Bank 0 & 3 are enabled.

You can find more details of GPIO IP in ZynqMP TRM General Purpose
I/O(Chapter-27).
https://www.xilinx.com/support/documentation/user_guides/ug1085-zynq-ultrascale-trm.pdf

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Documentation/devicetree/bindings/gpio/gpio-zynq.txt