clk: mediatek: add VDOSYS1 clock
authorPablo Sun <pablo.sun@mediatek.com>
Mon, 19 Sep 2022 16:56:00 +0000 (18:56 +0200)
committerChen-Yu Tsai <wenst@chromium.org>
Mon, 26 Sep 2022 05:26:20 +0000 (13:26 +0800)
commit3dfe6e17c97b16971619b53c2cc79185c7f8b9aa
treecaa265d91715e33a9e28548a88d14f2c6a245c4e
parent879b752b97f12b678978e17f57316641ef0f2aa0
clk: mediatek: add VDOSYS1 clock

Add the clock gate definition for the DPI1 hardware
in VDOSYS1.

The parent clock "hdmi_txpll" is already defined in
`mt8195.dtsi`.

Signed-off-by: Pablo Sun <pablo.sun@mediatek.com>
Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220919-v1-2-4844816c9808@baylibre.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
drivers/clk/mediatek/clk-mt8195-vdo1.c