RISC-V: Cache Management Operation instructions

RISC-V: Cache Management Operation instructions

This commit adds cbo.clea, cbo.flush, cbo.inval, cbo.zero, prefetch.i,
prefetch.r and prefetch.w instructions.

diff with the previous version:
We use unspec_volatile instead of unspec for those cache operations.
We use UNSPECV instead of UNSPEC and move them to unspecv.

gcc/ChangeLog:

	* config/riscv/predicates.md (imm5_operand): Add a new operand type for
	prefetch instructions.
	* config/riscv/riscv-builtins.cc (AVAIL): Add new AVAILs for CMO ISA
	Extensions.
	(RISCV_ATYPE_SI): New.
	(RISCV_ATYPE_DI): New.
	* config/riscv/riscv-ftypes.def (0): New.
	(1): New.
	* config/riscv/riscv.md (riscv_clean_<mode>): New.
	(riscv_flush_<mode>): New.
	(riscv_inval_<mode>): New.
	(riscv_zero_<mode>): New.
	(prefetch): New.
	(riscv_prefetchi_<mode>): New.
	* config/riscv/riscv-cmo.def: New file.