clk: sunxi-ng: Support separately grouped PLL lock status register
authorChen-Yu Tsai <wens@csie.org>
Sat, 28 Jan 2017 12:22:33 +0000 (20:22 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Mon, 30 Jan 2017 07:36:20 +0000 (08:36 +0100)
commit3de64bf187ce838b78ccd6ee7c1cc25e0aba07bd
treed8ac6c61d15f902b0a31f3f9e5e86752449ac532
parent82aab516ec96ab9f9ad4b80a0bab9368b1cd5cdc
clk: sunxi-ng: Support separately grouped PLL lock status register

On the Allwinner A80 SoC, the PLL lock status indicators are grouped
together in a separate register, as opposed to being scattered in each
PLL's configuration register.

Add a flag to support this.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
drivers/clk/sunxi-ng/ccu_common.c
drivers/clk/sunxi-ng/ccu_common.h