[ARM] Undeprecate complex IT blocks
authorMark Murray <mark.murray@arm.com>
Mon, 24 Jan 2022 10:39:03 +0000 (10:39 +0000)
committerMark Murray <mark.murray@arm.com>
Mon, 7 Feb 2022 15:47:53 +0000 (15:47 +0000)
commit3d7662142d50e4137332a0aa9d1e7d727aeb5941
treef8c422c0551696a5d742907957973628779c18f6
parentcdc0573f753e639ed78f2a3645179ac2d2718fd0
[ARM] Undeprecate complex IT blocks

AArch32/Armv8A  introduced the performance deprecation of certain patterns
of IT instructions.  After some debate internal to ARM, this is now being
reverted; i.e. no IT instruction patterns are performance deprecated
anymore, as the perfomance degredation is not significant enough.

This reverts the following:

"ARMv8-A deprecates some uses of the T32 IT instruction. All uses of
IT that apply to instructions other than a single subsequent 16-bit
instruction from a restricted set are deprecated, as are explicit
references to the PC within that single 16-bit instruction. This permits
the non-deprecated forms of IT and subsequent instructions to be treated
as a single 32-bit conditional instruction."

The deprecation no longer applies, but the behaviour may be controlled
by the -arm-restrict-it and -arm-no-restrict-it command-line options,
with the latter being the default. No warnings about complex IT blocks
will be generated.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D118044
33 files changed:
clang/docs/ClangCommandLineReference.rst
clang/include/clang/Driver/Options.td
clang/lib/Driver/ToolChains/Clang.cpp
clang/test/Driver/arm-restrict-it.c
clang/test/Driver/woa-restrict-it.c [deleted file]
llvm/docs/ReleaseNotes.rst
llvm/lib/Target/ARM/ARMInstrInfo.td
llvm/lib/Target/ARM/ARMInstrThumb2.td
llvm/lib/Target/ARM/ARMSubtarget.cpp
llvm/lib/Target/ARM/ARMSubtarget.h
llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
llvm/test/CodeGen/ARM/2013-05-05-IfConvertBug.ll
llvm/test/CodeGen/ARM/arm-and-tst-peephole.ll
llvm/test/CodeGen/ARM/arm-bf16-pcs.ll
llvm/test/CodeGen/ARM/atomic-ops-v8.ll
llvm/test/CodeGen/ARM/codesize-ifcvt.mir
llvm/test/CodeGen/ARM/fp16-no-condition.ll
llvm/test/CodeGen/ARM/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
llvm/test/CodeGen/ARM/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
llvm/test/CodeGen/ARM/ifcvt-branch-weight.ll
llvm/test/CodeGen/ARM/speculation-hardening-sls.ll
llvm/test/CodeGen/Thumb2/ifcvt-rescan-diamonds.ll
llvm/test/CodeGen/Thumb2/thumb2-ifcvt1.ll
llvm/test/CodeGen/Thumb2/thumb2-ifcvt2.ll
llvm/test/CodeGen/Thumb2/thumb2-ifcvt3.ll
llvm/test/CodeGen/Thumb2/v8_IT_3.ll
llvm/test/CodeGen/Thumb2/v8_IT_4.ll
llvm/test/CodeGen/Thumb2/v8_IT_5.ll
llvm/test/CodeGen/Thumb2/v8_deprecate_IT.ll [deleted file]
llvm/test/MC/ARM/deprecated-v8.s
llvm/test/MC/ARM/v8_IT_manual.s [deleted file]