drm/i915/tgl: Implement WAs 18011464164 and 22010931296
authorJosé Roberto de Souza <jose.souza@intel.com>
Wed, 8 Jul 2020 21:29:47 +0000 (14:29 -0700)
committerJosé Roberto de Souza <jose.souza@intel.com>
Thu, 9 Jul 2020 17:05:07 +0000 (10:05 -0700)
commit3d702d06cb3c06b34a58f01471e094d8156181ad
tree3eb4eb3dc5d1872098d19ef1e110c3ff3c62cade
parent99bcf64e1c1460ac6e0275e7024a3abb5f96ac14
drm/i915/tgl: Implement WAs 18011464164 and 22010931296

As today those 2 WAs have different implementation between TGL and DG1
WA pages but checking the HSD it is clear that DG1 implementation
should be used for both, also to do so is easier as we just need to
extend WA 1407928979 to B* stepping.

Both WAs are need to fix some possible render corruptions.

DG1 initial patches were not merged yet, as soon it is this WAs should
be applied to DG1 as well.

BSpec: 53508
BSpec: 52890
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200708212947.40178-1-jose.souza@intel.com
drivers/gpu/drm/i915/gt/intel_workarounds.c