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(parent: 474dadb) | patch
drm/msm/a6xx: Add support for using system cache on MMU500 based targets
authorJordan Crouse <jcrouse@codeaurora.org>
Wed, 25 Nov 2020 07:00:16 +0000 (12:30 +0530)
committerRob Clark <robdclark@chromium.org>
Sun, 29 Nov 2020 19:04:06 +0000 (11:04 -0800)
commit3d247123b5a16f5f43ddc0c86dba05b417b6cadc
treefb3b578d18f9eb1b12e33c1a19f6fca53a4f3150tree | snapshot
parent474dadb8b0d557661cb3d1727f1ff2f82bac6b4ccommit | diff
drm/msm/a6xx: Add support for using system cache on MMU500 based targets

GPU targets with an MMU-500 attached have a slightly different process for
enabling system cache. Use the compatible string on the IOMMU phandle
to see if an MMU-500 is attached and modify the programming sequence
accordingly.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
drivers/gpu/drm/msm/adreno/a6xx_gpu.c diff | blob | history
drivers/gpu/drm/msm/adreno/a6xx_gpu.h diff | blob | history
Domain: System / Kernel;