[AArch64] Add v8.5-a Memory Tagging STZGM instruction
authorDavid Spickett <david.spickett@arm.com>
Mon, 1 Apr 2019 14:56:37 +0000 (14:56 +0000)
committerDavid Spickett <david.spickett@arm.com>
Mon, 1 Apr 2019 14:56:37 +0000 (14:56 +0000)
commit3d233d5d4d82e8d3c6dfd39367dfaf9587c2107b
tree50ac1563fa9ec9d63e3e8fa1ce3e65866136b733
parent44668ae7c7df73ca255a688e534af49ac9600323
[AArch64] Add v8.5-a Memory Tagging STZGM instruction

This instruction writes a block of allocation tags
and stores zero to the associated data locations.

It differs from STGM by 1 bit and has the same
arguments.

The specification can be found here:
https://developer.arm.com/docs/ddi0596/c

Differential Revision: https://reviews.llvm.org/D60065

llvm-svn: 357397
llvm/lib/Target/AArch64/AArch64InstrInfo.td
llvm/test/MC/AArch64/armv8.5a-mte-error.s
llvm/test/MC/AArch64/armv8.5a-mte.s
llvm/test/MC/Disassembler/AArch64/armv8.5a-mte.txt