ARM: dts: at91: sama7g5ek: align power rails for sdmmc0/1
authorEugen Hristev <eugen.hristev@microchip.com>
Thu, 24 Nov 2022 15:46:10 +0000 (17:46 +0200)
committerClaudiu Beznea <claudiu.beznea@microchip.com>
Fri, 25 Nov 2022 08:33:17 +0000 (10:33 +0200)
commit3cf2291777abefe94b453d1d886e8a11f024912c
treeffdfef6e07adb467b33924951845645c85055bff
parent7a3c62678699d7e56736c2d0579d077a7773e77c
ARM: dts: at91: sama7g5ek: align power rails for sdmmc0/1

On this board SDMMC0 has a 1.8 signaled eMMC device powered at
3.3V. Hence, correctly describe the connected rails from the PMIC.

SDMMC1 is connected to a voltage switch that can change from
3.3V to 1.8V by a hardware controlled pin.
However SDMMC1 at the moment works only in 3.3V mode (default speed,
no UHS-I modes), thus connect the signaling to the 3.3V rail.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
[claudiu.beznea: reshaped a bit the commit message]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221124154610.246790-1-eugen.hristev@microchip.com
arch/arm/boot/dts/at91-sama7g5ek.dts