[X86][Costmodel] Load/store i16 Stride=3 VF=16 interleaving costs
authorRoman Lebedev <lebedev.ri@gmail.com>
Sun, 3 Oct 2021 20:37:22 +0000 (23:37 +0300)
committerRoman Lebedev <lebedev.ri@gmail.com>
Sun, 3 Oct 2021 20:40:21 +0000 (23:40 +0300)
commit3cbc0a07f92b4a630a1c03a6587d52f206ec8248
treef57e5348933b78e0bb5adf45ab60567d26172193
parent72f8a9244a64387d83a313607f94509cd2fd5fd2
[X86][Costmodel] Load/store i16 Stride=3 VF=16 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/1T6MMzeh3 - for intels `Block RThroughput: =28.0`; for ryzens, `Block RThroughput: <=8.5`
So pick cost of `28`.

For store we have:
https://godbolt.org/z/1T6MMzeh3 - for intels `Block RThroughput: <=27.0`; for ryzens, `Block RThroughput: <=7.0`
So pick cost of `27`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111017
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-3.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-3.ll