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(parent: 9ebcfad) | patch
perf/x86: Fix variable types for LBR registers
authorWei Wang <wei.w.wang@intel.com>
Sat, 13 Jun 2020 08:09:46 +0000 (16:09 +0800)
committerPeter Zijlstra <peterz@infradead.org>
Thu, 2 Jul 2020 13:51:45 +0000 (15:51 +0200)
commit3cb9d5464c1ceea86f6225089b2f7965989cf316
tree4c587f3a7517e98040de123521f8bcf6bd34e281tree | snapshot
parent9ebcfadb0610322ac537dd7aa5d9cbc2b2894c68commit | diff
perf/x86: Fix variable types for LBR registers

The MSR variable type can be 'unsigned int', which uses less memory than
the longer 'unsigned long'. Fix 'struct x86_pmu' for that. The lbr_nr won't
be a negative number, so make it 'unsigned int' as well.

Suggested-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Wei Wang <wei.w.wang@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20200613080958.132489-2-like.xu@linux.intel.com
arch/x86/events/perf_event.h diff | blob | history
Domain: System / Kernel;