Merge pull request #1236 from martin-frbg/l1cache
authorZhang Xianyi <traits.zhang@gmail.com>
Mon, 24 Jul 2017 04:07:00 +0000 (12:07 +0800)
committerGitHub <noreply@github.com>
Mon, 24 Jul 2017 04:07:00 +0000 (12:07 +0800)
commit3c4c47258470a47f5bf74f34ca89bdaa1b7318a1
treed819a585fb3cf364112b059bf3ef6dc1db2b7934
parenta797666fbeadeeb8729aedff8431e37c4e7cbc74
parent00774b1105ad5dbfe0e6be671096d51ad4a97b2e
Merge pull request #1236 from martin-frbg/l1cache

Use cpuid 4 with subleafs to query L1 cache size on Intel processors