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(parent: a1c34a9) | patch
Make fixed-abi default for AMD HSA OS
authormadhur13490 <Madhur.Amilkanthwar@amd.com>
Wed, 10 Feb 2021 16:11:36 +0000 (16:11 +0000)
committermadhur13490 <Madhur.Amilkanthwar@amd.com>
Fri, 19 Feb 2021 15:05:25 +0000 (15:05 +0000)
commit3c297a256442fb8363e70ed80407018cded0fcd4
tree89dc42b76d37ceec6f2106ad17eb0c4f068d7c84tree | snapshot
parenta1c34a9d6a5cbb25826455f67d98c2099d27391ccommit | diff
Make fixed-abi default for AMD HSA OS

fixed-abi uses pre-defined and predictable
SGPR/VGPRs for passing arguments. This patch makes
this scheme default when HSA OS is specified in triple.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D96340
32 files changed:
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-non-entry-func.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/addrspacecast.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/agpr-register-count.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/call-argument-types.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/call-constexpr.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/call-waitcnt.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/cc-update.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/fdiv-nofpexcept.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/ipra.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/lds-global-non-entry-func.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.implicitarg.ptr.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/need-fp-from-csr-vgpr-spill.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/reserve-vgpr-for-sgpr-spill.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/sibling-call.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/spill-csr-frame-ptr-reg-copy.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/stack-realign.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/wave32.ll diff | blob | history
llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir diff | blob | history
Domain: System / Toolchain;