dt-bindings: riscv: cpus: add a ref the common cpu schema
authorConor Dooley <conor.dooley@microchip.com>
Thu, 15 Jun 2023 22:50:14 +0000 (23:50 +0100)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 22 Jun 2023 21:23:52 +0000 (14:23 -0700)
commit3c1b4758a9544cbaf38d052ad66a69618e920ceb
tree47149899e25177d983ef53c32fb6168f3afd2614
parentac9a78681b921877518763ba0e89202254349d1b
dt-bindings: riscv: cpus: add a ref the common cpu schema

To permit validation of RISC-V cpu nodes, "additionalProperties: true"
needs to be swapped for "unevaluatedProperties: false". To facilitate
this in a way that passes dt_binding_check, a reference to the cpu
schema is required.

Disallow the generic cache-op-block-size property that that drags in,
since the RISC-V CBO extensions do not require a common size, and have
individual properties.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Link: https://lore.kernel.org/r/20230615-dubiously-parasail-79d34cefedce@spud
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Documentation/devicetree/bindings/riscv/cpus.yaml