target-arm: Remove redundant setting of IT bits before Thumb SWI
authorPeter Maydell <peter.maydell@linaro.org>
Fri, 14 Jan 2011 19:39:19 +0000 (20:39 +0100)
committerAurelien Jarno <aurelien@aurel32.net>
Fri, 14 Jan 2011 19:39:19 +0000 (20:39 +0100)
commit3c18340b5c5dc682ddb085335b1d3658b7bdd4d5
treef5e5eb21093e5438eb79b2b3146f8c40d1f87824
parent48fdde89dc54409c49052f027aa44f8021f32c37
target-arm: Remove redundant setting of IT bits before Thumb SWI

Remove a redundant call to gen_set_condexec() in the translation of Thumb
mode SWI. (SWI and WFI generate "exceptions" which happen after the
execution of the instruction, ie when PC and IT bits have updated.
So the condexec bits at this point are not correct. However, the code
that handles finishing the translation of the TB will write the correct
value of the condexec bits later, so the only effect was that a conditional
Thumb SWI would generate slightly worse code than necessary.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-arm/translate.c