drivers/perf: hisi: Add support for HiSilicon SLLC PMU driver
authorShaokun Zhang <zhangshaokun@hisilicon.com>
Mon, 8 Mar 2021 06:50:35 +0000 (14:50 +0800)
committerWill Deacon <will@kernel.org>
Thu, 25 Mar 2021 13:03:46 +0000 (13:03 +0000)
commit3bf30882c3c7b6e376d9d6d04082c9aa2d2ac30a
tree3cd5ab00bf3acc719afad24a4802f3fa14a207ac
parentcce03e702c9f26a43b16c51bf03029911feab692
drivers/perf: hisi: Add support for HiSilicon SLLC PMU driver

HiSilicon's Hip09 is comprised by multi-dies that can be connected by SLLC
module (Skyros Link Layer Controller), its has separate PMU registers which
the driver can program it freely and interrupt is supported to handle
counter overflow. Let's support its driver under the framework of HiSilicon
uncore PMU driver.

SLLC PMU supports the following filter functions:
* tracetag_en: allows user to count data according to tt_req or
tt_core set in L3C PMU.

* srcid_cmd & srcid_msk: allows user to filter statistics that come from
specific CCL/ICL by configuration source ID.

* tgtid_hi & tgtid_lo: it also supports event statistics that these
operations will go to the CCL/ICL by configuration target ID or
target ID range. It's the same as source ID with 11-bit width in
the SoC. More introduction is added in documentation:
Documentation/admin-guide/perf/hisi-pmu.rst

Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: John Garry <john.garry@huawei.com>
Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: John Garry <john.garry@huawei.com>
Co-developed-by: Qi Liu <liuqi115@huawei.com>
Signed-off-by: Qi Liu <liuqi115@huawei.com>
Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
Link: https://lore.kernel.org/r/1615186237-22263-8-git-send-email-zhangshaokun@hisilicon.com
Signed-off-by: Will Deacon <will@kernel.org>
drivers/perf/hisilicon/Makefile
drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c [new file with mode: 0644]
include/linux/cpuhotplug.h