[ARM][MVE] Decoding of VMSR doesn't diagnose some unpredictable encodings
authorOliver Stannard <oliver.stannard@linaro.org>
Tue, 3 Sep 2019 09:55:30 +0000 (09:55 +0000)
committerOliver Stannard <oliver.stannard@linaro.org>
Tue, 3 Sep 2019 09:55:30 +0000 (09:55 +0000)
commit3be2df2418ee8b70c3051203b56ac422e8108a3f
treeafd0c09f7502c0287e350d916c98566715b4e827
parent39bf484d92b76a1ecf6b3787284e65477cfd8684
[ARM][MVE] Decoding of VMSR doesn't diagnose some unpredictable encodings

Decoding of VMSR doesn't diagnose some unpredictable encodings, as the unpredictable bits are not correctly set.

Diff-reduce this instruction's internals WRT VMRS so I can see the differences better. Mostly this is s/src/Rt/g.

Fill in the "should-be-(0)" bits.

Designate the Unpredictable{} bits for both VMRS and VMSR.

Patch by Mark Murray!

Differential revision: https://reviews.llvm.org/D66938

llvm-svn: 370729
llvm/lib/Target/ARM/ARMInstrVFP.td
llvm/test/MC/Disassembler/ARM/vmrs-vmsr-invalid.txt [new file with mode: 0644]