review.tizen.org Git - platform/upstream/llvm.git/commit

author	Xiang1 Zhang <xiang1.zhang@intel.com>
	Wed, 7 Apr 2021 00:10:31 +0000 (08:10 +0800)
committer	Xiang1 Zhang <xiang1.zhang@intel.com>
	Sun, 25 Apr 2021 01:45:41 +0000 (09:45 +0800)
commit	3b8ec86fd576b9808dc63da620d9a4f7bbe04372
tree	fc48539b2a307aa23aefb27ddeda59e066a4cf2a	tree \| snapshot
parent	e6131f7ee54e1660be519fc7172fbbbc2b4da803	commit \| diff

[X86] Support AMX fast register allocation

Differential Revision: https://reviews.llvm.org/D100026

20 files changed:

llvm/include/llvm/CodeGen/Passes.h		diff \| blob \| history
llvm/include/llvm/CodeGen/TargetPassConfig.h		diff \| blob \| history
llvm/lib/CodeGen/TargetPassConfig.cpp		diff \| blob \| history
llvm/lib/Target/X86/CMakeLists.txt		diff \| blob \| history
llvm/lib/Target/X86/X86.h		diff \| blob \| history
llvm/lib/Target/X86/X86FastTileConfig.cpp	[new file with mode: 0644]	blob
llvm/lib/Target/X86/X86LowerAMXIntrinsics.cpp		diff \| blob \| history
llvm/lib/Target/X86/X86LowerAMXType.cpp		diff \| blob \| history
llvm/lib/Target/X86/X86PreAMXConfig.cpp	[new file with mode: 0644]	blob
llvm/lib/Target/X86/X86TargetMachine.cpp		diff \| blob \| history
llvm/test/CodeGen/X86/AMX/amx-configO0toO0.ll	[new file with mode: 0644]	blob
llvm/test/CodeGen/X86/AMX/amx-configO2toO0-lower.ll	[new file with mode: 0644]	blob
llvm/test/CodeGen/X86/AMX/amx-configO2toO0-precfg.ll	[new file with mode: 0644]	blob
llvm/test/CodeGen/X86/AMX/amx-configO2toO0.ll	[new file with mode: 0644]	blob
llvm/test/CodeGen/X86/AMX/amx-fast-tile-config.mir	[new file with mode: 0644]	blob
llvm/test/CodeGen/X86/AMX/amx-low-intrinsics-no-amx-bitcast.ll		diff \| blob \| history
llvm/test/CodeGen/X86/AMX/amx-low-intrinsics.ll		diff \| blob \| history
llvm/test/CodeGen/X86/O0-pipeline.ll		diff \| blob \| history
llvm/tools/opt/opt.cpp		diff \| blob \| history
llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn		diff \| blob \| history

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