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(parent: 5eedf07) | patch
GlobalISel: Infer nofpexcept flag during selection for non-strict ops
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Sun, 31 May 2020 18:19:46 +0000 (14:19 -0400)
committerMatt Arsenault <arsenm2@gmail.com>
Fri, 5 Jun 2020 17:59:46 +0000 (13:59 -0400)
commit3b5d4aa258a0f7ccbd5c3ade4286dca8f5d2d984
treed758450264ea6472e09fcdabdecd2ea4796480adtree | snapshot
parent5eedf07ab999d0a8ba43f41e0c1012d8f6e62c11commit | diff
GlobalISel: Infer nofpexcept flag during selection for non-strict ops

Match SelectionDAG's behavior of adding nofpexcept to out instructions
that may raise fp exceptions that are selected from instructions that
do not.
63 files changed:
llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.s16.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pkrtz.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.s16.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.s16.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.s16.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.legacy.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.s16.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.clamp.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.legacy.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.s16.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.s16.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s16.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s32.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s64.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcanonicalize.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fceil.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fceil.s16.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.s16.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fexp2.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s16.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s32.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s64.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fma.s32.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.s16.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.v2s16.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.s16.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.v2s16.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.s16.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.v2s16.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.s16.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.v2s16.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.v2s16.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptosi.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptoui.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-frint.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-frint.s16.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-intrinsic-trunc.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-intrinsic-trunc.s16.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sitofp.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uitofp.mir diff | blob | history
llvm/test/CodeGen/X86/GlobalISel/select-add.mir diff | blob | history
llvm/test/CodeGen/X86/GlobalISel/select-fadd-scalar.mir diff | blob | history
llvm/test/CodeGen/X86/GlobalISel/select-fdiv-scalar.mir diff | blob | history
llvm/test/CodeGen/X86/GlobalISel/select-fmul-scalar.mir diff | blob | history
llvm/test/CodeGen/X86/GlobalISel/select-fpext-scalar.mir diff | blob | history
llvm/test/CodeGen/X86/GlobalISel/select-fptrunc-scalar.mir diff | blob | history
llvm/test/CodeGen/X86/GlobalISel/select-fsub-scalar.mir diff | blob | history
llvm/test/CodeGen/X86/GlobalISel/select-sub.mir diff | blob | history
llvm/test/CodeGen/X86/GlobalISel/x86_64-select-fptosi.mir diff | blob | history
llvm/test/CodeGen/X86/GlobalISel/x86_64-select-sitofp.mir diff | blob | history
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