ARM: at91: setup outer cache .write_sec() callback if needed
authorClément Léger <clement.leger@bootlin.com>
Mon, 6 Jun 2022 14:57:01 +0000 (16:57 +0200)
committerClaudiu Beznea <claudiu.beznea@microchip.com>
Wed, 20 Jul 2022 08:05:48 +0000 (11:05 +0300)
commit3b5a7ca7d252b96e9623b262414713828b2bd68f
treeeed183f9bcc26fb67a08bc5c992fac86aec8dca7
parentc71572aa544ca64cbd2ff2052c79bc7e3573baed
ARM: at91: setup outer cache .write_sec() callback if needed

When running under OP-TEE, the L2 cache is configured by OP-TEE and the
sam platform code does not allow any modification yet. Setup a dummy
.write_sec() callback to avoid triggering exceptions when Linux tries
to modify the L2 cache configuration.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
[claudiu.beznea: keep .init_early populated only for SAMA5D2, remove
 sam_secure_init() from sama5d2_init() as it is also called in
 sama5_secure_cache_init()]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220606145701.185552-3-clement.leger@bootlin.com
arch/arm/mach-at91/sama5.c