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(parent: a188339) | patch
clk: socfpga: stratix10: add additional clocks needed for the NAND IP
authorDinh Nguyen <dinguyen@kernel.org>
Mon, 24 Jun 2019 21:47:10 +0000 (16:47 -0500)
committerStephen Boyd <sboyd@kernel.org>
Tue, 25 Jun 2019 21:36:56 +0000 (14:36 -0700)
commit3b5015c4d834a70233c4419b07375254e4675e0b
tree47aa187642650e7bd5b7eaa625f2317642e14efatree | snapshot
parenta188339ca5a396acc588e5851ed7e19f66b0ebd9commit | diff
clk: socfpga: stratix10: add additional clocks needed for the NAND IP

The nand_clk is actually called the nand_x_clk and the parent is the
l4_mp_clk, not the l4_main_clk. The nand_clk is a child of the
nand_x_clk and has a fixed divider of 4. The same is true for the
nand_ecc_clk.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/socfpga/clk-s10.c diff | blob | history
include/dt-bindings/clock/stratix10-clock.h diff | blob | history
Domain: System / Kernel;