[RISCV] Add classes to define SchedWrite list
authorwangpc <pc.wang@linux.alibaba.com>
Wed, 1 Mar 2023 08:49:28 +0000 (16:49 +0800)
committerwangpc <pc.wang@linux.alibaba.com>
Tue, 7 Mar 2023 09:54:05 +0000 (17:54 +0800)
commit3b1240ea763d8c4a536af713ae1e6aad9c1f4da3
treecf96dacdd2d908f00b05170e6e5da6959bee0041
parentfb309041f0c37fa2798305ae02cf6910bf0b402b
[RISCV] Add classes to define SchedWrite list

SchedWrites are relevant to LMUL for most instructions, so we have
to enumerate all defined SchedWrites when defining ReadAdcance.
This patch adds some classes to simplify these definitions.

Reviewed By: michaelmaitland

Differential Revision: https://reviews.llvm.org/D145041
llvm/lib/Target/RISCV/RISCVScheduleV.td