ARM: zynq: ddrc: Setup half of memory only for ECC case
authorMichal Simek <michal.simek@xilinx.com>
Thu, 5 Sep 2013 06:41:19 +0000 (08:41 +0200)
committerMichal Simek <michal.simek@xilinx.com>
Mon, 26 Jan 2015 07:55:57 +0000 (08:55 +0100)
commit3ad87ca18203f8b0de0e30b7c12d2ffadf2d8553
treec595054fbb2d15ae0c03d6d22928b5187b8019e6
parent555c7c066f9fd5a3d9a241fa873c65e4a6596244
ARM: zynq: ddrc: Setup half of memory only for ECC case

Setup half of memory from ram_size for ECC case.
All the time the same board can be configured
with or without ECC. Based on ECC case detection
use half of memory with the same configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arch/arm/cpu/armv7/zynq/ddrc.c