RISC-V: KVM: Add timer functionality
authorAtish Patra <atish.patra@wdc.com>
Mon, 27 Sep 2021 11:40:11 +0000 (17:10 +0530)
committerAnup Patel <anup@brainfault.org>
Mon, 4 Oct 2021 10:37:16 +0000 (16:07 +0530)
commit3a9f66cb25e18a3eeca36c08d9f823a35b3ddc22
treea15be60b9addd26c0fde559d2f2a80cad0bda612
parent9955371cc014e02a1ef2d13c4aaf743d18bd66aa
RISC-V: KVM: Add timer functionality

The RISC-V hypervisor specification doesn't have any virtual timer
feature.

Due to this, the guest VCPU timer will be programmed via SBI calls.
The host will use a separate hrtimer event for each guest VCPU to
provide timer functionality. We inject a virtual timer interrupt to
the guest VCPU whenever the guest VCPU hrtimer event expires.

This patch adds guest VCPU timer implementation along with ONE_REG
interface to access VCPU timer state from user space.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
arch/riscv/include/asm/kvm_host.h
arch/riscv/include/asm/kvm_vcpu_timer.h [new file with mode: 0644]
arch/riscv/include/uapi/asm/kvm.h
arch/riscv/kvm/Makefile
arch/riscv/kvm/vcpu.c
arch/riscv/kvm/vcpu_timer.c [new file with mode: 0644]
arch/riscv/kvm/vm.c
drivers/clocksource/timer-riscv.c
include/clocksource/timer-riscv.h [new file with mode: 0644]