AMDGPU: More bits of frame index are known to be zero
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Sat, 27 Feb 2016 20:26:57 +0000 (20:26 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Sat, 27 Feb 2016 20:26:57 +0000 (20:26 +0000)
commit3a61985b2fe922ee7c94c0aa148fad046347829d
tree2c8a3a6d5e4450fb7dd03f0535f7d827a210cd4d
parentd6ebd07b8d1ba5fed46790e0246a2d0716c4b63b
AMDGPU: More bits of frame index are known to be zero

The maximum private allocation for the whole GPU is 4G,
so the maximum possible index for a single workitem is the
maximum size divided by the smallest granularity for a dispatch.

This increases the number of known zero high bits, which
enables more offset folding. The maximum private size per
workitem with this is 128M but may be smaller still.

llvm-svn: 262153
llvm/lib/Target/AMDGPU/AMDGPU.td
llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
llvm/test/CodeGen/AMDGPU/private-element-size.ll
llvm/test/CodeGen/AMDGPU/scratch-buffer.ll