ASoC: tlv320aic32x4: Model BDIV divider in CCF

ASoC: tlv320aic32x4: Model BDIV divider in CCF

commit 9b484124ebd906c4d6bc826cc0d417e80cc1105c upstream.

Model and manage BDIV divider as components in the Core
Clock Framework.  This should allow us to do some more complex
clock management and power control.  Also, some of the
on-board chip clocks can be exposed to the outside, and this
change will make those clocks easier to consume by other
parts of the kernel.

Signed-off-by: Annaliese McDermond <nh6z@nh6z.net>
Signed-off-by: Mark Brown <broonie@kernel.org>