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(parent: cae78e0) | patch
drm/amd/display: correct eDP T9 delay
authorHugo Hu <hugo.hu@amd.com>
Tue, 6 Oct 2020 09:21:00 +0000 (17:21 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 2 Nov 2020 20:31:10 +0000 (15:31 -0500)
commit3a372bed1e337efa450d8288bc75cfc9237b7bad
tree7ba10106226aa2010cca196621c2a2f4d062bdadtree | snapshot
parentcae78e0331459643e21b982e4833a6525a43e498commit | diff
drm/amd/display: correct eDP T9 delay

[Why]
The current end of T9 delay is relay on polling
sink status by DPCD. But the polling for sink
status change after NoVideoStream_flag set to 0.

[How]
Add function edp_add_delay_for_T9 to add T9 delay.
Move the sink status polling after blank.

Signed-off-by: Hugo Hu <hugo.hu@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c diff | blob | history
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c diff | blob | history
drivers/gpu/drm/amd/display/dc/inc/link_hwss.h diff | blob | history
Domain: System / Kernel;