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(parent: ed4a0cc) | patch
arm: xilinx: Setting default i2c clock frequency to 400kHz
authorVaralaxmi Bingi <varalaxmi.bingi@amd.com>
Mon, 10 Jul 2023 12:37:27 +0000 (14:37 +0200)
committerMichal Simek <michal.simek@amd.com>
Fri, 21 Jul 2023 07:00:38 +0000 (09:00 +0200)
commit39bdb9649810a1d664e21e92ae8b9553e798a0e8
treeca8482c31b064dd81a563ebadf47e2dbf7e1fc6dtree | snapshot
parented4a0ccb6e7d7fa2e8b92f5c07590a361a6efd30commit | diff
arm: xilinx: Setting default i2c clock frequency to 400kHz

Setting default i2c clock frequency for Zynq and ZynqMP to maximum rate of
400kHz. Current default value is 100kHz.

Signed-off-by: Varalaxmi Bingi <varalaxmi.bingi@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fb46fe911a68b79c8e4d150ca90c4e94eb5fb9e1.1688992653.git.michal.simek@amd.com
arch/arm/dts/zynq-7000.dtsi diff | blob | history
arch/arm/dts/zynqmp.dtsi diff | blob | history
Domain: System / Kernel;