[X86][Costmodel] Load/store i8 Stride=6 VF=2 interleaving costs
authorRoman Lebedev <lebedev.ri@gmail.com>
Sun, 3 Oct 2021 20:22:58 +0000 (23:22 +0300)
committerRoman Lebedev <lebedev.ri@gmail.com>
Sun, 3 Oct 2021 20:38:10 +0000 (23:38 +0300)
commit396b95e5c9ede161b3634f7c8046188b7da8f387
treea69594932a404086e9158022efa6530ec78b6f0d
parenta944f801cacdaa40b3869986844a6ffa08b87c19
[X86][Costmodel] Load/store i8 Stride=6 VF=2 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/jvj6jzns5 - for intels `Block RThroughput: =6.0`; for ryzens, `Block RThroughput: <=3.0`
So pick cost of `6`.

For store we have:
https://godbolt.org/z/ros7eebMP - for intels `Block RThroughput: =7.0`; for ryzens, `Block RThroughput: <=3.0`
So pick cost of `7`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111008
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-6.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-6.ll