intel/fs: Allow multiple slots for position
authorCaio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Fri, 21 Sep 2018 23:07:38 +0000 (16:07 -0700)
committerMarge Bot <eric+marge@anholt.net>
Tue, 7 Apr 2020 17:16:09 +0000 (17:16 +0000)
commit395de69b1febf4cfca29482e1ff7ddd2ae400d8b
treea9a63e938be900cf535fdc734c0281edc2ef348e
parentafa5447312352cd68d4688d9521cb1de25a9939c
intel/fs: Allow multiple slots for position

Change brw_compute_vue_map() to also take the number of pos slots.  If
more than one slot is used, the VARYING_SLOT_POS is treated as an
array.

When using Primitive Replication, instead of a single position, the
VUE must contain an array of positions.  Padding might be
necessary (after clip distance) to ensure rest of attributes start
aligned.

v2: Add note about array in the commit message and assert that
    pos_slots >= 1 to make clear 0 is invalid. (Jason)
    Move padding to be after the clip distance.

v3: Apply the correct offset when gathering the sources from outputs.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> [v2]
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2313>
13 files changed:
src/gallium/drivers/iris/iris_program.c
src/intel/blorp/blorp.c
src/intel/compiler/brw_compiler.h
src/intel/compiler/brw_fs.cpp
src/intel/compiler/brw_fs_visitor.cpp
src/intel/compiler/brw_shader.cpp
src/intel/compiler/brw_vec4_gs_visitor.cpp
src/intel/compiler/brw_vec4_tcs.cpp
src/intel/compiler/brw_vue_map.c
src/intel/vulkan/anv_pipeline.c
src/mesa/drivers/dri/i965/brw_gs.c
src/mesa/drivers/dri/i965/brw_vs.c
src/mesa/drivers/dri/i965/brw_wm.c