[RISCV] Do not mandate scheduling for CSR instructions
authorEvandro Menezes <ebahapo@users.noreply.github.com>
Wed, 5 Aug 2020 21:51:05 +0000 (16:51 -0500)
committerEvandro Menezes <ebahapo@users.noreply.github.com>
Mon, 21 Sep 2020 23:24:53 +0000 (18:24 -0500)
commit394d02016705e4b0fdfaa34c53be695f3f61922d
tree2544f19ba3cdd04e737be9e79cfd1077dd4fe416
parent161159888b430dad90605563259cd28b1ad25b14
[RISCV] Do not mandate scheduling for CSR instructions

Scheduling information is of little value when they may disrupt the
pipeline.  This patch allows omitting the scheduling information for CSR
instructions while still setting `SchedMachineModel::CompleteModel`.  For
specific cases, any scheduling information added will be used by the
scheduler.

Differential revision: https://reviews.llvm.org/D85366
llvm/lib/Target/RISCV/RISCVInstrInfo.td