Do not consider a machine instruction that uses and defines the same
authorUlrich Weigand <ulrich.weigand@de.ibm.com>
Tue, 13 Nov 2012 18:40:58 +0000 (18:40 +0000)
committerUlrich Weigand <ulrich.weigand@de.ibm.com>
Tue, 13 Nov 2012 18:40:58 +0000 (18:40 +0000)
commit3946877f8835b50e67d55f6a807e62a1969e0fc3
treeb79f7b9fc27707ef5214cd33effe70b88041501e
parent70b4dcfbcd1f388b8dc8adef8c175a4924fa0121
Do not consider a machine instruction that uses and defines the same
physical register as candidate for common subexpression elimination
in MachineCSE.

This fixes a bug on PowerPC in MultiSource/Applications/oggenc/oggenc
caused by MachineCSE invalidly merging two separate DYNALLOC insns.

llvm-svn: 167855
llvm/lib/CodeGen/MachineCSE.cpp
llvm/test/CodeGen/PowerPC/2012-10-11-dynalloc.ll [new file with mode: 0644]